A non-transparent bridge enables two hosts or memory domains to be electrically isolated. The devices on either side of the non-transparent bridge are not visible from the other side, but the non-transparent bridge allows a path for data transfer and status exchange between the processor domains of the devices.
FIG. 1 illustrates a block diagram 100 of a prior art doorbell register 105. A device on the primary side of the non-transparent bridge can write or program the prior art doorbell register 105 to send interrupts upstream to another device on the secondary side of the non-transparent bridge ending up at the attached Root Port.
The prior art doorbell register 105 has fixed or hard-coded bits that are mapped to specific eXtended Message Signaled Interrupts (MSI-X) vectors. For example, the bits 0 to 3 of the prior art doorbell register 105 are mapped to the MSI-X vector 0 110 and so on. A user of the non-transparent bridge device may be restricted by the pre-defined mapping of the doorbell register bits to the MSI-X vectors.